Following a holistic hardware/software co-design approach, PlasmoniAC targets the following objectives:
i) to elevate plasmonics into a computationally-credible platform with Nx100 Gb/s bandwidth, μm2-scale size and >1014 MAC/s/W computational energy efficiency, using CMOS compatible BTO and SiOC materials for electro-and thermo-optic computational functions,
ii) to blend them via a powerful 3D co-integration platform with SixNy-based photonic interconnects and with non-volatile memristor-based weight control,
iii) to fabricate two different sets of 100 Gb/s 16-and 8-fan-in linear plasmonic neurons,
iv) to deploy a whole new class of plasmo-electronic and nanophotonic activation modules,
v) to demonstrate a full-set of sin2(x), ReLU, sigmoid and tanh plasmonic neurons for Feed-Forward and recurrent neurons,
vi) to embrace them into a properly adapted Deep Learning training model suite, ultimately delivering a neuromorphic plasmonic software design library, and
vii) to apply them on IT security-oriented applications for threat and malware detection.