A Collaborative Research Center to Redefine the Boundaries of Chip Design

The Collaborative Research Center/Transregio TRR404 – “Next Generation Electronics with Active Devices in Three Dimensions [Active-3D]” officially began its endeavor in April 2025. The goal is to redefine the boundaries of chip design by developing novel device and integration strategies that enable the integration of active devices directly within the volume above the chip area.

This ambitious, interdisciplinary research initiative brings together leading experts from Dresden University of Technology, RWTH Aachen University, AMO GmbH, Forschungszentrum Jülich, the Max Planck Institute of Microstructure Physics Halle (MPI-MSP), Nanoelectronic Materials Laboratory (NaMLab) in Dresden, and Ruhr University Bochum (RUB).

A New Paradigm for Semiconductor Technology

Semiconductor technology forms the backbone of modern society, powering advancements across communication, medicine, transportation, industrial production, and even agriculture. This progress has been driven by increasingly smaller, cheaper, and more energy-efficient devices — a trend famously described by Moore’s Law. Shrinking the transistor, the fundamental building block of integrated circuits, has historically led to lower costs per function, enhanced performance, and improved energy efficiency.

In recent years, however, further downscaling of transistors has slowed, as the approach nears its physical limits. Innovation has shifted towards maximizing space efficiency through new architectures that minimize unused or “dead” areas within the chip. This evolution — enabled by material, device, and circuit co-design — has continued to sustain Moore’s Law and advance the boundaries of semiconductor performance and efficiency, even as traditional scaling approaches reach their limits.

The Collaborative Research Center TRR404 – Active-3D is now set to push this boundary even further by “exploiting the third dimension” and integrating active devices directly into the volume above the chip area. The spokesperson of TRR404 is Prof. Thomas Mikolajick, CEO of NaMLab and professor at TU Dresden; vice-spokesperson is Prof. Max Lemme, CEO of AMO GmbH and professor at RWTH Aachen University.

“There is Plenty of Room at the Top!”

Prof. Lemme explains: “Richard Feynman famously declared in his 1959 lecture that ‘There’s plenty of room at the bottom,’ highlighting the untapped potential of the nanoscale. Today, we state ‘There is plenty of room at the top,’ looking at the untapped potential of the volume above the chips. Within Active-3D, we are determined to explore how to fully utilize this volume by integrating active devices into the Back-End of Line (BEOL) — enabling logic, memory functionality, and even active interconnects directly within the vertical space of the chip structure.”

 

This approach promises to drastically improve power efficiency, performance, and area metrics. In particular, it will enable embedding logic and memory functions vertically within a single chip, circumventing the so-called “von Neumann bottleneck” — the physical separation between memory and logic components in traditional chip design. This separation is a major limitation, especially in power-intensive applications such as Machine Learning and Artificial Intelligence. By merging logic and memory within the BEOL volume, Active-3D seeks to eliminate this bottleneck, enabling faster data flow and reducing power consumption.

A Long-Term Perspective for an Ambitious Project

The realization of such a novel paradigm requires the integration and tailoring of a wide range of materials, the development of highly sophisticated manufacturing technologies, and a completely fresh perspective on circuit and system design. To achieve this, the Active-3D consortium brings together leading researchers from Dresden and the Aachen-Jülich area. This collaboration ensures a comprehensive approach — from fundamental materials research to prototype development and performance simulations.

This ambitious research is made possible by the long-term funding perspective — up to 12 years — provided by the German Research Foundation (Deutsche Forschungsgemeinschaft, DFG) for Collaborative Research Centers. By the end of the 12-year funding period, Active-3D aims to answer key scientific questions surrounding the optimal BEOL devices, material combinations, and fabrication techniques required to create truly three-dimensional active circuits. The project’s breakthroughs will set the stage for future scientific advancements and industrial applications, strengthening Germany and Europe’s position at the forefront of microelectronics innovation.

AMO’s and ELD’s contributions

AMO is part of the endeavor with two projects. One, led by Prof. Yana Vaynzof (TU Dresden) and Dr. Maryam Mohammadi (AMO), is very fundamental and it is going to explore the possibility of realizing vertical field effect transistors (FETs) based on perovskites. The second project focuses instead on the co-integration of two more mature device-technologies – namely the technology for FET based on two-dimensional materials developed at AMO, and memristive devices developed at Research Center Jülich – to realize full-BEOL elements for energy-efficient matrix-vector-multiplication. This project is led by Dr. Zhenxing Wang (AMO) and Dr. Dr. Susanne Hoffmann-Eifert (FZ Jülich).

In addition, Prof. Max Lemme and the Chair of Electronic Devices at RWTH are involved in other two projects: one dedicated to the optimization of FETs based on 2D materials, in cooperation with the group of Prof. Xinliang Feng (TU Dresden), and one dedicated to the development of new contacting, wiring, and integration schemes for 3D architectures, in cooperation with the group of Prof. Thomas Mikolajick.

More information

More information and updates in Active-3D’s homepage.